Arm CPUs Hit By Straight Line Speculation Vulnerability, LLVM Adds Initial Mitigation
While Intel's CrossTalk/SRBDS vulnerability dominated the conversation on Tuesday, Arm quietly revealed a new speculative execution vulnerability of its own called Straight Line Speculation...
Intel Developer Posts Latest Patch For Variable Refresh Rate Within X.Org Modesetting
With Intel supporting Adaptive-Sync/VRR with Gen11+ graphics and these days with effectively only supporting xf86-video-modesetting for X.Org-driven Linux desktops rather than their basically dead xf86-video-intel driver, the Intel open-source Linux developers continue working on plumbing variable refresh rate support into this generic modesetting DDX...
Linux 5.8 Supports Nested AMD Live Migration With KVM
Sent in last week to the Linux 5.8 mainline kernel were all the Kernel-based Virtual Machine (KVM) updates...
LLVMpipe Gains Support For On-Disk Shader Cache
The LLVMpipe software OpenGL implementation that recently has seen work on MSAA, tessellation shader support, and other improvements, now has a working on-disk shader cache implementation...
Linux 5.8 To Support Emulating MLC NAND Flash Memory As SLC
The Linux MTD subsystem that abstracts raw flash devices will allow emulating MLC NANDs as SLC in an attempt to boost reliability...
Mesa 20.1.1 Released With The Open-Source Driver Stack Being In Good Shape
Mesa 20.1 was released at the end of May while now Mesa 20.1.1 is out as the first point release to this Q2'2020 driver series...
Linux 5.8 Brings Boost Support To CPPC CPUFreq Driver
The ACPI-defined Collaborative Processor Performance Control (CPPC) CPUFreq driver will support "boosting" to the optimal performance level with the Linux 5.8 kernel...
Intel Details Lakefield With Hybrid Technology
Intel has provided more public details today on their hybrid processor efforts, initially with their "Lakefield" CPUs for small form factor devices...
Benchmarking The Updated Intel CPU Microcode For SRBDS / CrossTalk Mitigation
Following yesterday's disclosure of CrossTalk / SRBDS after a nearly two year embargo period for this Special Register Buffer Data Sampling vulnerability, I have been running benchmarks on multiple systems for the past nearly 24 hours. Here are some preliminary data points for both synthetic and real-world workloads on various Intel CPUs before/after mitigating SRBDS with the updated Intel microcode.
Sienna Cichlid Support For RadeonSI Merged Into Mesa 20.2
The previously reported on Sienna Cichlid support for AMD's RadeonSI OpenGL driver has finished its quick review process and now merged for Mesa 20.2...