To support the launch of Intel's latest 12th generation 'Alder Lake' processors, Intel has also pulled the trigger on its latest Z690 motherboard chipset. Using a new LGA1700 socket, some of the most significant advancements with Alder Lake and Z690 include PCIe 5.0 support from the processor, as well as a PCIe 4.0 x8 link from the processor to the chipset. In this article, we're taking a closer look at over

Alongside a slew of software-related announcements this morning from NVIDIA as part of their fall GTC, the company has also quietly announced a new server GPU product for the accelerator market: the NVIDIA A2. The new low-end member of the Ampere-based A-series accelerator family is designed for entry-level inference tasks, and thanks to its relatively small size and low power consumption, is also being aimed at edge computing scenarios as well.

Along with serving as the low-end entry point into NVIDIA

Today as part of NVIDIA’s fall GTC event, the company has announced that the Jetson embedded system kits will be getting a refresh with NVIDIA’s forthcoming Orin SoC . Due early next year, Orin is slated to become NVIDIA’s flagship SoC for automotive and edge computing applications. And, has become customary for NVIDIA, they are also going to be making Orin available to non-automotive customers through their Jetson embedded computing program, which makes the SoC available on a self-contained modular package.

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After the publication of the LPDDR5X memory standard earlier this summer, Samsung has now been the first vendor to announce new modules based on the new technology.

The LPDDR5X standard will start out at speeds of 8533Mbps, a 33% increase over current generation LPDDR5 based products which are running at 6400Mbps.

As an industry, we are slowly moving into an era where how we package the small pieces of silicon together is just as important as the silicon itself. New ways to connect all the silicon include side by side, on top of each other, and all sorts of fancy connections that help keep the benefits of chiplet designs but also taking advantage of them. Today, AMD is showcasing its next packaging uplift: stacked L3 cache on its Zen 3 chiplets, bumping each chiplet from 32 MiB to 96 MiB

AMD today is formally unveiling their AMD Instinct MI200 family of server accelerators. Based on AMD’s new CDNA 2 architecture, the MI200 family is the capstone AMD’s server GPU plans for the last half-decade. By combing their GPU architectural experience with the latest manufacturing technology from TSMC and home-grown technologies such as their chip-to-chip Infinity Fabric, AMD has put together their most potent server GPUs yet. And with MI200 parts already shipping to the

Since AMD’s relaunch into high-performance x86 processor design, one of the fundamental targets for the company was to be a competitive force in the data center. By having a competitive product that customers could trust, the goal has always been to target what the customer wants, and subsequently grow market share and revenue. Since the launch of 3 ^rd Generation EPYC, AMD is growing its enterprise revenue at a good pace, however questions always turn around to what the roadmap might hold. In the past,

As part of their third quarter earnings release, VIA Technologies has announced this morning that the company is entering into an unusual agreement with Intel to offload parts of VIA’s x86 R&D subsidiary, Centaur Technology. Under the terms of the murky deal, Intel will be paying Centaur $125 million to pick up part of the engineering staff – or, as the announcement from VIA more peculiarly puts it “recruit some of Centaur's employees to join Intel,” Despite the hefty 9-

Today marks the official retail availability of Intel’s 12 ^th Generation Core processors, starting with the overclockable versions this side of the New Year, and the rest in 2022. These new processors are the first widescale launch of a hybrid processor design for mainstream Windows-based desktops using the underlying x86 architecture: Intel has created two types of core, a performance core and an efficiency core, to work together and provide the best of performance and low power in a singular package. This hybrid

Today, we’re taking an in-depth look at Google's Tensor SoC, the chip powering their new Pixel 6 family of phones. The Tensor is Google's first custom-designed SoC, and incorporates a mix of custom Google IP blocks – such as the new edgeTPU – as well as some off-the-shelf blocks from Samsung. Google designed the Tensor SoC to give them better performance, particularly in machine learning workloads, which Google is increasingly favoring.

So sit back as we dive into