Microchip is entering the market for PCIe retimer chips with a pair of new retimers supporting PCIe 5.0's 32GT/s link speed. The new XpressConnect RTM-C 8xG5 and 16xG5 chips extend the reach of PCIe signals while adding less than 10ns of latency.

As PCIe speeds have increased, the practical range of PCIe signals across a circuit board has decreased, requiring servers to start including PCIe signal repeaters. For PCIe gen3, mostly-analog redriver chips were

Bringing a new range of hardware to market is not an easy task, even for Intel. The company has an install base of its ‘Gen’ graphics in hundreds of millions of devices around the world, however the range of use is limited, and it doesn’t tackle every market. This is why Intel started to create its ‘X ^e ’ graphics portfolio. The new graphics design isn’t just a single microarchitecture – by mixing and matching units where needed, Intel has identified four configurations that target key

As part of Intel’s next generation X ^e graphics strategy, one of the key elements is going to be the offerings for the enterprise market. For commercial enterprises that need hardcore compute resources, the Intel’s X ^e -HP products are expected to be competition against Ampere and CDNA. The HP design, as we’ve already seen in teaser photos, is designed to leverage both scale-up and scale-out by using a multi-tile strategy paired with high-bandwidth memory.

As far as

Following the formal launch of Intel’s first discrete GPU in over a generation, the DG1, this morning Intel is launching the server counterpart to that chip, the very plainly named “Intel Server GPU”. Previously referred to as SG1, the Intel Server GPU is based on the same Xe-LP architecture design as the DG1, but aimed at the server market. And like the consumer DG1, Intel is planning on taking an interesting, somewhat conservative tack with their new silicon, chasing after

Earlier this year, we wrote a news segment about AMD and Google’s announcement about bringing confidential virtual machines to the cloud using features enabled through 2 ^nd Gen AMD EPYC processors. At the time, AMD and Google marketed the announcement as the first commercially available cloud confidential VMs, powered through AMD’s Secure Encryption Virtualization feature. After writing up the news, I got a rather sternly worded email from IBM, stating that AMD/Google were not the first – IBM claims to have been offering confidential VMs to its

As previously announced by Apple this summer, the company is embarking on a major transition within its Mac product lineup. After almost a decade and a half of relying on Intel’s x86 processors to serve at the heart of every Mac, the company is going to be shifting to relying on its own, in-house designed Arm processors to power their now un-PC computers. At the time Apple set the start of the transition at the end of this year, and right on cue, today Apple

Today, Apple has unveiled their brand-new MacBook line-up. This isn’t an ordinary release – if anything, the step that Apple is making today is something that hasn’t happened in 15 years: The start of a CPU architecture transition across their whole consumer Mac line-up.

Thanks to the company’s vertical integration across hardware and software, this is a monumental change that nobody but Apple can so swiftly usher in. The last time Apple ventured into such an undertaking in 20

Today Apple is expected to pull the trigger on new ‘Apple Silicon’ Macbooks. Years in the making, today we should be hearing about a lew of new devices from the Cupertino company which ditch x86 processors in favour of their own in-house designs.

We don’t know exactly what Apple has in store for us, but an upsized chip variant of the A14, maybe an A14X, is going to be a likely bet. Whatever Apple presents today, following the event

One of the more exciting connectivity standards over the past year has been CXL. Built upon a PCIe physical foundation, CXL is a connectivity standard designed to handle much more than what PCIe does – aside from simply acting as a data transfer from host to device, CXL has three branches to support, known as IO, Cache, and Memory. As defined in the CXL 1.0 and 1.1 standards, these three form the basis of a new way to connect a host with a device. The new CXL

Last week, Kioxia rounded out their lineup of PCIe 4.0 enterprise and datacenter SSDs with the announcement of the XD6 . Now, they're bringing PCIe 4.0 support to their client NVMe product line with the new XG7 and XG7-P M.2 NVMe SSDs. The XG7 family doubles the sequential read speed and increases sequential write speed by 60% compared to the XG6 series , thanks to the PCIe 4.0 support and a new SSD controller. Based on XG