Synopsys, Inc. today announced advancements across its leading hardware-assisted verification (HAV) portfolio, including new hardware platforms and capabilities to support the ever-expanding demand for AI chip verification from the data center to the edge. Synopsys HAV platforms, powered by the company's unique software-defined capabilities, set new performance, scalability, and use case benchmarks for verifying the world's most sophisticated multi-die and AI chips amidst compounding design complexity and time-to-market requirements.

AI chip verification complexity is escalating rapidly as large language models continue to double in size roughly every four months, and interface data rates advance at a 2x rate every three years. Simultaneously, edge AI architectures are driving aggressive throughput, latency, and power‑efficiency targets that further expand the design and validation workload. To keep pace, the industry requires HAV solutions to support broader application coverage and run quadrillions of verification cycles, enabling first‑time‑right silicon and a seamless ability to integrate heterogeneous AI systems.