Here is the first die visualization of AMD's new "Renoir" processor. Having made its debut with Ryzen 4000 series mobile processors, "Renoir" succeeds a decade-long legacy of AMD APUs that combine CPUs with powerful iGPUs. AMD designed "Renoir" on TSMC's 7 nm silicon fabrication process. The die measures 156 mm², and has a transistor-count of 9.8 billion. The die shot reveals distinct areas that look like the processor's 8 CPU cores, a cluster of GPU compute units, the integrated memory controllers, southbridge, and PHYs for the chip's various I/O.

"Renoir" features 8 CPU cores based on the "Zen 2" microarchitecture, divided into two 4-core CCXs (CPU complexes). Unlike on 8-core chiplets meant for "Matisse" or "Rome" MCMs, the "Renoir" CCX only features 4 MB of shared L3 cache, probably because latencies to the memory controller are low enough. The L2 cache per core is unchanged at 512 KB. The "total cache" (L2 + L3 on silicon) adds up to 12 MB. The iGPU of "Renoir" is a hybrid between "Vega" and "Navi." The SIMD components are carried over from "Vega," while the display- and multimedia engines are from "Navi." The iGPU features 8 NGCUs that add up to 512 stream processors. Infinity Fabric covers much of the die area, connecting the various components on the die. AMD introduced a new dual-channel integrated memory controller that supports LPDDR4x at up to 4233 MHz, and standard DDR4 up to 3200 MHz.