EPYC with SOCAMM2 in 2027
AMD has confirmed that LPDDR5X SOCAMM2 support in its EPYC server lineup will start with Verano in 2027, not with Venice in 2026. In an April 6 blog post, the company said the 6th Gen EPYC family will support DDR5 RDIMM and MRDIMM memory, while Verano will be the first AMD server CPU to add SKUs with LPDDR5X SOCAMM2 support.
That leaves Venice on a more traditional server memory path. AMD still positions Venice as its next major EPYC CPU for 2026, but the shift to LPDDR5X-based SOCAMM2 is reserved for a later product. AMD also says Verano will serve as the host CPU for future Instinct GPU generations in its AI rack-scale platforms.
AMD EPYC Server CPU Adoption of LPDDR5X SOCAMM2
The 6th generation AMD EPYC Server CPU family will support industry-standard DDR5 RDIMM and MRDIMMs based memory. It will also offer SKUs that support the new LPDDR5x SOCAMM2-based memory. In the server market, AMD plans to first support LPDDR5X SOCAMM2 memory with the 6th Generation AMD EPYC Server CPU code-named “Verano” available in 2027. Verano will be the optimized host CPU for the future generations of AMD Instinct GPUs and leverage LPDDR5X SOCAMM2 to deliver optimized Perf/System-Watt in AI Rack Scale Solutions from AMD. This combination of bandwidth, power efficiency, and serviceability is expected to make LPDDR5X SOCAMM2 components a valuable, complementary component of next-generation AI and data center infrastructure.
SOCAMM2 is a modular server memory format built around low-power LPDDR5X. It targets AI and data center systems where bandwidth, density, and power draw all affect rack design. Micron says its latest SOCAMM2 module reaches 256 GB and delivers 33% more capacity in the same footprint as its predecessor.
© MICRON AMD also described Verano in February as a next-generation EPYC processor with workload-specific optimizations, while still grouping both Venice and Verano under the 6th Gen EPYC umbrella.
Source: AMD
