According to well-known Intel leaker Jaykihn, Intel is preparing two "Nova Lake-S" CPU models with a 22-core configuration, enhanced by the big Last Level Cache (bLLC). These processors are part of the Core Ultra 5 400S family, and Intel is developing two mid-range configurations, each with 22 cores. Both models will feature 6 "Coyote Cove" P-Cores, 12 "Arctic Wolf" E-Cores, and 4 LPE-Cores. This design includes a single compute die aimed at mid-range gaming rigs. Alongside the 22 cores, Intel plans to add an extra 108 MB of bLLC cache to boost gaming performance, similar to AMD's approach with its Ryzen X3D gaming CPUs, which currently lead in gaming performance. Intel aims to match raw CPU compute power with newer CPU cores and use bLLC to improve latency-sensitive tasks like gaming. The only difference between the two new models is that one is an unlocked 125 W TDP version, part of the "K" overclockable family, while the other is a 65 W base TDP model.

Recently, it has been observed that Intel's upcoming Z9x0 platform for "Nova Lake-S" will support up to 52 cores in a single LGA-1954 socket. Some early rumors suggest a PL2 power draw of 474 W , which is a significant increase over previous designs. This is understandable, considering that the design brings workstation-like core counts into the consumer sector for the first time. Regarding the socket, Intel's LGA-1954 has been pictured with a 2-lever independent loading mechanism (ILM), similar to what Intel's HEDT sector uses. This is typically reserved for larger CPU packages, and with the pin count now nearing 2,000 socket pins, it is a necessary choice for Intel. Importantly, the first "Nova Lake-S" CPU SKUs are scheduled for release in just a few months, likely leading to more rumors as we approach the final launch.