JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD330-4: Standard Package High Bandwidth Memory (SPHBM4). SPHBM4 uses the same DRAM dies as HBM4, commonly used in artificial intelligence accelerators, with a new interface base die that enables mounting on standard organic substrates rather than silicon substrates. JESD330-4 is available for download from the JEDEC website.

JESD330-4 SPHBM is architected to operate at the same aggregate data throughput as HBM4 using fewer pins by operating at a higher frequency. Where the HBM4 interface has 2048 data signals, when published, SPHBM4 will define 512 data signals with 4:1 serialization to achieve the same bandwidth. This change allows the relaxed bump pitch required for connection to organic substrates.