AMD EPYC Venice banner confirms 16-core CCXs and 32-core CCDs
AMD’s 256-core EPYC Venice package has been pictured in more detail ahead of the company’s Advancing AI 2026 keynote.
© ComputerBase ComputerBase photographed an AMD banner installed around the Moscone Center West in San Francisco. The banner includes an artist’s rendering of the processor’s internal structure, showing two large I/O dies surrounded by eight compute dies.
Each CCD contains two Core Complexes, or CCXs. Each CCX has 16 cores, giving the CCD a total of 32 cores. The eight-CCD configuration therefore provides 256 cores across 16 CCXs.
© CNBC The rendering shows the cores in a 2 × 4 × 4 arrangement within each CCD. This appears to represent the dense Zen 6c configuration used by the highest-core-count Venice processors rather than the larger standard Zen 6 cores.
AMD had already confirmed that 6th Gen EPYC Venice would support up to 256 cores and use the Zen 6 architecture. The company has also started ramping Venice production on TSMC’s 2nm process, which AMD describes as the first production ramp of a high-performance computing product on this technology.
© ComputerBase More architecture and platform details are expected during AMD CEO Lisa Su’s Advancing AI keynote tomorrow. Hopefully, AMD has at least one segment for consumers. Otherwise, this will be little more than an analyst and AI fan fest.
Source: ComputerBase via Andreas Schilling
