Intel on Thursday made several technological disclosures about its latest silicon fabrication process, the 10 nm SuperFin. With this, the company is changing the nomenclature of its node refinements, away from the ## nm++ naming scheme (with each "+" denoting a refinement, or internode), to a more descriptive naming scheme. The new 10 nm SuperFin node is the first refinement of the company's 10 nm node that debuted with the company's 10th Gen Core "Ice Lake" processors last year, and promises energy efficiency in the ballpark of 7 nm-class nodes by competitors TSMC and Samsung. While past generations of internodes (refinements) delivered energy efficiency improvements of around 3-5%, 10 nm SuperFin offers the kind of improvements expected from a brand new node, according to Intel.

The 10 nm SuperFin node is composed of two key innovations, the SuperMIM capacitor and a redesigned FinFET transistor. The new SuperMIM (metal insulator metal) capacitor offers a 5x increase in capacitance compared to devices in this class. The redesigned FinFET introduces a new barrier that reduces via resistance by 30%. Combined, the 10 nm SuperFin node affords chips a V/F curve comparable to a die-shrink to a whole new silicon fabrication node, without any change in transistor density. The first product built on 10 nm SuperFin is the upcoming Core "Tiger Lake" processor addressing the client-segment. The company is already working on enhancements of this node relevant for data-center processors.