Open Source LLM

432-Core RISC-V Processor with Chiplets Aims to Provide Ultra-Efficient Floating-Point Computation

Researchers at the Integrated Systems Laboratory (IIS) of ETH Zürich and the Energy-efficient Embedded Systems (EEES) group of the University of Bologna teamed up to form a project called Parallel Ultra Low Power (PULP) Platform project, with an aim to provide open hardware with efficiency in mind. Today, we learn that the PULP project has made significant progress with its " Occamy " project to explore ultra-efficient floating-point computation. The Occamy is a high-performance AI chip designed for efficiency. Based on RISC-V ISA, each Occamy chiplet uses 216 of 32-bit "Snitch" open-source cores organized in groups of four compute clusters, where each cluster shares tightly-coupled memory among eight compute cores and a high-bandwidth (512-bit) DMA-enhanced core directing the data flow. For control, the Occamy chiplet features "CVA6" open-source, Linux-capable, 64-bit RISC-V core.

With 16 GB high-bandwidth HBM2E memory available to each chiplet via 2.5D integration, the compute chiplet is built on a GlobalFoundries' 12 nm GF12LPP low-power process, and placed on top of a passive 65 nm interposer. Featuring about one billion transistors, they are packed in a 72 square millimeter solution, which is placed on a 52.5x45 mm carrier PCB for Fan-Out mounting. The entire Occamy chiplet features two compute dies for a total of 432 cores and two 16 GB HBM2E memory dies that can communicate with a neighboring chiplet over a 19.5 GB/s wide, source-synchronous technology-independent die-to-die DDR link. Regarding the performance target, Occamy is capable of 0.768 TeraFLOPS for FP64, 1.536 TeraFLOPS for FP32, 3.072 TeraFLOPS for FP16/FP16alt, and 6.144 TeraFLOPS for FP8/FP8alt. The exact number is yet to be determined for power usage, but the estimates are around the low 10s of Watts range. Once the assembled system has arrived, more numbers will be published.
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