It was less than one month ago that Intel announced AVX10 as the successor to AVX-512. In that time Intel engineers have begun posting AVX10.1 enablement patches for GCC as well as beginning AVX10 discussions for the LLVM compiler stack . Overnight already the initial AVX10.1 enablement code has been merged into the GNU Compiler Collection.

The latest GCC development code for what will premiere with GCC 14.1 stable next year has the preliminary AVX10.1 target. The initial AVX10.1 patches for GCC were merged this morning for adding the foundation of AVX10.

AVX10.1 is what will be found with Xeon Scalable "Granite Rapids" processors as the initial stepping stone towards future Intel processors with AVX10.2+ where there may be P/E cores with AVX10 and other new features.

As part of this initial enablement is adding the "-mavx10.1" compiler switch and changing the existing Granite Rapids target from AVX-512 references to AVX10.1. There are also patches merged around supporting AVX10.1 for AVX512DQ + AVX512VL intrinsics.

This initial AVX10.1 enablement for GCC is off to a quick and good start. The patches can be found in GCC Git and hopefully before the GCC 14 feature freeze we'll see more AVX10 bits land. We are also waiting to see Intel's compiler enablement work around the new Advanced Performance Extensions (APX) functionality.