Intel's next-gen CPU boosts to 2.8 GHz without Hyper-Threading — Lunar Lake chip with eight cores, eight threads has a bigger L2 cache than the L3 cache

(Image credit: Tom's Hardware)

Critical specifications for an early sample of Intel's upcoming Lunar Lake CPU have leaked out, detailing its core and thread count, cache configuration, and frequency (via HXL ). While the specifications imply Lunar Lake is very similar to its predecessor, Meteor Lake , in many ways, it might make some significant changes regarding cache and Hyperthreading.

The specifications come from a screenshot of Windows Task Manager running on what is purported to be a Lunar Lake-equipped PC, courtesy of Zhihu user Xziar . The alleged Lunar Lake chip is an A1 sample, which means it's the first working model to come out of the fabs. Historically, A1 silicon tends to be in prototype territory, especially for Intel; Meteor Lake was on stepping C0 (with the C meaning the third major revision), Raptor Lake was B0, and Alder Lake was C0. So, this Lunar Lake chip is probably not the final product.

Some of these specs are more or less expected. Lunar Lake is physically small and seemingly focused towards mobile efficiency , so there only being eight cores total isn't surprising. The L1 cache amount also implies that Lunar Lake doesn't come with any low-power E-Cores like Meteor Lake , or all are low-power but with increased L1 cache size. The 2.8 GHz boost clock is also unsurprising since the sample is likely ES silicon.

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Header Cell - Column 0 Lunar Lake*
P-Core ArchitectureLion Cove
E-Core ArchitectureSkymont
P-Core Count4
E-Core Count4
Thread Count8
L1 Cache836KB (112KB per P-Core, 96KB per E-Core)
L2 Cache14MB (2.5MB per P-Core, 4MB per four E-Cores)
L3 Cache12MB
Boost Clock~2.8GHz
ProcessIntel 18A/TSMC N3B

* Specifications are unconfirmed.

Things get weird when you start looking at the cache, though. It would appear Lunar Lake is identical to Meteor Lake in the L1 and L2 cache, or at least that's what the screenshot implies. However, the Lunar Lake sample has only 12MB of L3 cache, lower than the 14MB of L2 cache. Usually, a higher level of cache means more capacity, and often significantly more, so it's very unintuitive that Lunar Lake should have less L3 than L2 cache. This directly contradicts an earlier leak that showed 16MB of L3 cache for Lunar Lake but has identical specifications otherwise.

(Image credit: Xziar/Zhihu )

It's possible that the Task Manager didn't read the Lunar Lake chip correctly and that the sample has 16MB of L3, but that might not be true. In response to a comment comparing Lunar Lake to Intel's low-end N300, XZiar said "this cache is obviously not up to par." That would be a weird response if Task Manager were wrong, and it would seem that the leaker thinks 12MB of L3 cache is the correct figure.

The other weird specification is the thread count, which is just eight. Intel's previous hybrid architecture CPUs have included Hyperthreading for the P-Cores, which should result in 12 threads. Since A1 silicon is unlikely to be the final product, it's possible it's simply disabled because of technical issues or for testing purposes. On the other hand, early Arrow Lake samples don't have Hyper-Threading either . Although that could be a coincidence, it raises the possibility that Intel may be moving on from Hyperthreading in 2024.

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Matthew Connatser is a freelancing writer for Tom's Hardware US. He writes articles about CPUs, GPUs, SSDs, and computers in general.