Intel

TSMC 2 nm Node to Enter Risk Production in Q4-2024, Mass Production in Q2-2025 if All Goes Well

The cutting edge 2 nm EUV foundry node by TSMC is expected to enter risk product in Q4 2024, according to a report by Taiwan-based industry observer DigiTimes. 2 nm would be an important milestone for the foundry company, as it would be the first from the company to implement GAA (gates all around) FETs, the technological successor to FinFETs, which drove silicon fabrication node development for almost a decade, from 16 nm to 3 nm. The GAAFET technology will be critical for the foundry's journey between 2 nm and 1 nm.

TSMC is expected to risk-produce chips on its 2 nm node in its new fab at the Baoshan campus in the Hsinchu Science Park, located in northern Taiwan. Should all go well with risk production, one can expect mass production of chips by Q2-2025. Until then, refinements to the company's final FinFET node, the N3 family, will remain the cutting-edge of silicon fabrication. Samsung has a similar 2025 target set for mass production on its 2 nm node, dubbed SF2. Across the Pacific, Intel Foundry Services has its Intel 20A node, which implements GAAFET (aka RibbonFET) technology aiming for similar timelines, including an ambitious 2024 mass production target.