Samsung aims for 13Gbps HBM4e

Samsung HBM4E plans (AI Upscaled), Source: SEDaily

A lot had changed since AMD began fusing HBM into its products. While it did not help AMD win the enthusiast market, it pushed the GPU business into a new direction that lasted only until the Vega family. Today high‑bandwidth memory is used mainly on data‑center GPUs. For a good reason, those systems are much more expensive and sophisticated, they now feature up to 16 high stacks of memory and are expected to reach 13 Gbps bandwidth.

We know this because Samsung has revealed more details of its next‑generation HBM4e memory at the OCP Global Summit. The company is targeting per‑pin speeds above 13 Gbps and a total bandwidth of 3.25 TB/s, about 2.5 times faster than current HBM3e. Samsung also says power efficiency will more than double, with energy use dropping below 1.95 pJ/bit, less than half that of HBM3e.

Samsung HBM4E & LPDDR6, Source: SEDaily

The push reportedly comes after NVIDIA requested higher‑speed memory for its upcoming Vera Rubin AI accelerator. While the JEDEC HBM4 standard caps bandwidth at 8 Gbps per pin, NVIDIA has urged Samsung, SK hynix and Micron to exceed 10 Gbps. Asian media report that Samsung may dissolve its 1c DRAM yield‑improvement task force to fast‑track HBM4 mass production, even as early cold tests show yields below 50%. The company has reportedly skipped its usual internal production review and moved directly toward ramping production.

Samsung reportedly shifted its HBM4 base die process to a 4 nm FinFET node, positioning itself ahead of competitors in both speed and manufacturing scale. Volume production of 10 Gbps‑capable chips is expected to begin by late 2025.

Source: TechPowerUP , SEDaily