NVIDIA unveils Vera Rubin Superchip at GTC Washington, featuring dual GPUs and Vera CPU
NVIDIA has shown its next-generation Vera Rubin Superchip for the first time during GTC Washington 2025. The system, displayed on stage by CEO Jensen Huang, combines a new Vera CPU with two large Rubin GPUs on a single board, signaling the company’s next step in AI compute architecture.
The motherboard-sized prototype, labeled Vera Rubin Superchip, integrates LPDDR system memory alongside HBM4 memory directly attached to the GPUs. NVIDIA confirmed that the first Rubin GPUs have already reached internal labs, with mass production of the Superchip planned for 2026.
Source: NVIDIA
Each Rubin GPU consists of two reticle-sized dies, delivering up to 50 PFLOPS of FP4 performance and 288 GB of HBM4 memory per unit. The accompanying Vera CPU features 88 Arm-based cores and 176 threads, linked to the GPUs via NVLINK-C2C interconnect providing 1.8 TB/s of bandwidth.
NVIDIA states that the full NVL144 system will offer up to 3.6 Exaflops FP4 inference and 1.2 Exaflops FP8 training, roughly 3.3× faster than the current GB300 NVL72 platform. Memory capacity rises to 13 TB/s of HBM4 bandwidth and 75 TB of fast system memory, with NVLINK and CX9 throughput doubled to 260 TB/s and 28.8 TB/s, respectively.
Source: NVIDIA
The company also previewed the Rubin Ultra NVL576, expected in the second half of 2027. This larger configuration scales to four reticle-sized GPU chips with 1 TB of HBM4e memory and a total performance target of 15 Exaflops FP4 and 5 Exaflops FP8. The system increases total fast memory to 365 TB and network bandwidth up to 1.5 PB/s via NVLINK.
NVIDIA also presented several variants of Compute Trays including a CPX version designed for larger context for AI models.
Source: NVIDIA
NVIDIA Vera generation is to be succeeded by the Feynmann architecture around 2027-2028. NVIDIA has not yet presented any chip based on this architecture.
Source: NVIDIA GTC Keynote
