Up until recently, Apple and NVIDIA maintained neat and clearly delineated orbits within TSMC's sprawling fabs, with the former leveraging the fab giant's leading-edge process and InFO (Integrated Fan-Out) packaging tech for its A-series processors, while the latter continuing to utilize TSMC's older-gen process alongside CoWoS (Chip-on-Wafer-on-Substrate) packaging technology for its GPUs.
Yet, as both Apple and NVIDIA adopt a more aggressive design language for their bespoke chips, their heretofore neat orbits within TSMC are increasingly likely to come into a titanic crash, with lucrative opportunities for Intel and Samsung in the offing.
Apple has been using InFO-PoP packaging technology for its A-series chips, where the DRAM is mounted directly on top of the SoC. However, as we noted in a recent post, Apple is expected to switch to WMCM packaging for its upcoming A20 chips , allowing for the integration of multiple individual dies - such as the CPU, GPU, and the Neural Engine - onto a single package, which provides an unprecedented level of flexibility due to the sheer number of die configurations that then become available.
Concurrently, Apple appears to be opting for TSMC's SoIC-MH packaging technology for its upcoming M5 Pro and M5 Max chips . For the benefit of those who might not be aware, the .
What's more, Apple's upcoming M5-series chips are also expected to employ a new Liquid Molding Compound (LMC), which will be exclusively supplied by Taiwan’s Eternal Materials. Critically, the LMC is designed and engineered to meet the demanding specifications of TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) packaging , which provides another incremental hint as to Apple's intention to eventually adopt CoWoS for its M-series chips.
Now, SemiAnalysis has just penned a pertinent post, noting that Apple currently dominates TSMC's AP3 (InFo) packaging, while NVIDIA is a titan where AP5/AP6 (CoWoS) packaging tech is concerned. However, "as Apple moves toward M5/M6 Ultra chips utilizing SoIC (System on Integrated Chips) and WMCM," . This convergence of roadmaps poses a future risk for capacity allocation."
Of course, analyst after analyst has identified TSMC's advanced packaging as a critical emerging bottleneck. In a scenario where Apple has to fight with NVIDIA for TSMC's advanced packaging resources, one can very well visualize a scenario where the Cupertino giant might eventually be forced to offload more of its chip fabrication needs onto Intel and Samsung.
As such, Apple is already evaluating Intel's 18A-P process for its lowest-end M-series chips that are expected to ship in 2027. According to SemiAnalysis, if Apple were to shift 20 percent of its base M-series wafers to Intel's 18A-P process, the move would allow Intel to earn around $630 million in foundry revenue, assuming an ASP of $18,000, wafer size of 150-170 sq. mm, and yields of above 70 percent.
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