China’s Innosilicon LPDDR6/5X IP is now shipping to first customers
Innosilicon has delivered its LPDDR6/5X Combo PHY plus controller IP to a “top-tier” customer, marking a commercial deployment of a domestic LPDDR6 interface IP. The company claims the subsystem supports up to 14.4Gbps per pin, and is designed to work across multiple FinFET process nodes.
Innosilicon confirmed that it was the same customer they previously worked with on Combo memory-subsystem IP from LPDDR4 through LPDDR5X, and that this new block focuses on bandwidth, latency, and power efficiency while supporting both LPDDR6 and LPDDR5X.
LPDDR6 itself is now a finalized JEDEC standard (since July last year), with an official top speed that aligns with the 14.4Gbps figure being cited for new IP and early platform planning.
Source: Innosilicon
As far as I know, Micron is the only major DRAM vendor that has publicly stated LPDDR6 sampling to partners so far. Samsung and SK hynix have discussed LPDDR6 readiness and have been showing LPDDR6-related memory at CES, but without the same explicit “sampling to customers” claim in public materials.
On the silicon enablement side, large EDA/IP vendors have already announced LPDDR6 PHY and controller IP availability, which is one of the prerequisites for SoC teams to tape out designs for future mobile and client platforms. This type of memory is to be used by next-gen products. Intel’s just-announced Panther Lake platform still relies on LPDDR5X technology.
Source: Innosilicon
