Sometimes an out-of-the-box approach can go a long way in papering over the inherent weaknesses in a given chip architecture. And, the new Dimensity 9500s chip from MediaTek might just be the perfect emblem for illustrating this innovation vs. herd-following paradigm.

MediaTek certainly has been employing plenty of innovation in recent years to stand out from the crowd. After all, it was the first to jettison efficiency cores in its quest for a performance boost . And now, it just might make older-gen CPU cores cool again, courtesy of an innovative gambit within the new Dimensity 9500s chip.

MediaTek's Dimensity 9500s SoC features an all-big-core CPU design :

1. 1x ARM Cortex-X925 up to 3.73GHz with 2MB L2 cache
2. 3x ARM Cortex-X4 with 1MB L2 cache
3. 4x ARM Cortex-A720 with 512KB L2 cache

GPU :

1. Immortalis-G925 MP12 GPU with ray tracing support

Other specs :

1. TSMC 3nm (N3E) process node
2. MediaTek NPU with agentic AI support
3. LPDDR5x RAM
4. UFS 4 + MCQ

For comparison, here is the :

CPU :

1. 2x high-performance, third-gen Oryon cores clocked at 3.80GHz
2. 6x medium-performance, third-gen Oryon cores clocked at 3.32GHz

GPU :

1. Adreno 840 with ray tracing support

Other specs :

1. TSMC 3nm (N3P) process node
2. Qualcomm Hexagon NPU with agentic AI support
3. LPDDR5x RAM
4. UFS 4.1 storage

We noted recently that one of the primary reasons behind the performance discrepancy between MediaTek's Dimensity 9500 chip and Google's Tensor G5 SoC could be traced back to the fact that the former used ARM's latest cores while the latter decided to go with ARM generic cores that are now over two and a half years old .

Well, MediaTek has used ARM CPU cores on the new Dimensity 9500s SoC that are . As a rule of thumb, newer-gen CPU cores will always trump older-gen ones when it comes to raw performance and efficieny.

However, MediaTek then did something that is quite quirky: it equipped the Dimensity 9500s with the largest-in-class CPU cache of 19MB . The chip also boasts of an L3 cache of 12MB and System Level Cache (SLC) of 10MB. For comparison, the Snapdragon 8 Gen 5 features an .

Remember, a CPU cache boosts efficiency by acting as a bridge between the processor cores and the much slower RAM. It allows the most frequently used data and instructions to be stored directly on the die, thereby reducing the latency and power consumption associated with fetching data from the RAM.

It will take a while until serious benchmark scores for the Dimensity 9500s start populating the public airwaves. As such, I'm very interested to see how the chip's gigantic CPU cache affects its efficiency and performance metrics.

In the meantime, kudos to MediaTek for thinking out of the box. If this strategy succeeds, I would not be surprised if a lot of chip designers start turning to older-gen CPU cores to stave off the oncoming DRAM-led cost inflation, especially for their non-flagship chips.

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