AMD at its Financial Analyst Day 2020 presentation made a major clarification about its silicon fabrication process. It was previously believed that the company's upcoming "Zen 3" CPU microarchitecture and RDNA2 graphics architectures were based on TSMC's N7+ (7 nm EUV) silicon fabrication process because AMD would mark the two as "7 nm+" in its marketing slides. Throughout its Financial Analyst Day presentation, however, AMD avoided using that marker, and resorted to an amorphous "7 nm" marker, prompting one of the financial analysts to seek a clarification. At the time, AMD responded that they were aligning their marketing with that of TSMC, and hence chose to use "7 nm" in its new slides.

It turns out that the next step to TSMC N7, the company's current-generation 7 nm DUV silicon fabrication node, isn't N7+ (7 nm EUV), but rather it has a nodelet along the way, which the foundry refers to as N7P. This is a generational refinement of N7, but does not use EUV lithography, which means it may not offer the 15-20 percent gains in transistor densities offered by N7+ over N7. AMD clarified that "7 nm+" in its past presentations did not intend to signify N7+, and that the "+" merely denoted an improvement over N7. At the same time, it won't specify whether "Zen 3" and RDNA2 are based on N7P or N7+, so the company doesn't rule out N7+, either. We'll probably learn more as we near the late-2020 launch of "Zen 3" as EPYC "Milan."